2DMAC: A Sustainable and Efficient Medium Access Control Mechanism for Future Wireless NoCs

IF 2.1 4区 计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Sidhartha Sankar Rout, Mitali Sinha, Sujay Deb
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Abstract

Wireless Network-on-Chip (WNoC) requires a Medium Access Control (MAC) mechanism for an interference-free sharing of the wireless channel. In traditional MAC, a token is circulated among the Wireless Interfaces (WIs) in a Round Robin manner. The WI with the token holds the channel for a fixed number of cycles. However, the channel requirement of the individual WIs dynamically changes over time due to the varying traffic density across the WNoC. Moreover, the conventional WNoCs give equal importance to all the traffic taking the wireless path and transmit it in an oldest-first manner. Nevertheless, the critical data can degrade the system performance to a large extent by delaying the application runtime if not served promptly. We propose 2DMAC, which can change the token arbitration pattern and tune the channel hold time of each WI based on its runtime traffic density and criticality status. Moreover, 2DMAC prioritizes the critical traffic over the non-critical traffic during the wireless data transfer. The proposed mechanism improves the wireless channel utilization by 15.67% and the network throughput by 29.83% and reduces the critical data latency by 29.77% over the traditional MAC.

2DMAC:面向未来无线网络中心的一种可持续、高效的媒介访问控制机制
无线片上网络(WNoC)需要一种介质访问控制(MAC)机制来实现无线信道的无干扰共享。在传统的MAC中,令牌以轮询的方式在无线接口(wi)之间循环。带有令牌的WI为固定数量的周期保持通道。然而,由于WNoC上不同的流量密度,各个wi的信道需求会随时间动态变化。此外,传统wnoc对采用无线路径的所有业务同等重视,并以最老优先的方式传输。但是,如果不及时提供关键数据,则会延迟应用程序运行时,从而在很大程度上降低系统性能。我们提出了2DMAC,它可以改变令牌仲裁模式,并根据每个WI的运行时流量密度和临界状态调整通道保持时间。此外,在无线数据传输过程中,2DMAC将关键流量优先于非关键流量。该机制与传统MAC相比,无线信道利用率提高15.67%,网络吞吐量提高29.83%,关键数据延迟降低29.77%。
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来源期刊
ACM Journal on Emerging Technologies in Computing Systems
ACM Journal on Emerging Technologies in Computing Systems 工程技术-工程:电子与电气
CiteScore
4.80
自引率
4.50%
发文量
86
审稿时长
3 months
期刊介绍: The Journal of Emerging Technologies in Computing Systems invites submissions of original technical papers describing research and development in emerging technologies in computing systems. Major economic and technical challenges are expected to impede the continued scaling of semiconductor devices. This has resulted in the search for alternate mechanical, biological/biochemical, nanoscale electronic, asynchronous and quantum computing and sensor technologies. As the underlying nanotechnologies continue to evolve in the labs of chemists, physicists, and biologists, it has become imperative for computer scientists and engineers to translate the potential of the basic building blocks (analogous to the transistor) emerging from these labs into information systems. Their design will face multiple challenges ranging from the inherent (un)reliability due to the self-assembly nature of the fabrication processes for nanotechnologies, from the complexity due to the sheer volume of nanodevices that will have to be integrated for complex functionality, and from the need to integrate these new nanotechnologies with silicon devices in the same system. The journal provides comprehensive coverage of innovative work in the specification, design analysis, simulation, verification, testing, and evaluation of computing systems constructed out of emerging technologies and advanced semiconductors
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