Modeling and Implementation of a Specific Microprocessor to Enhance the Performance of PLCs Employing FPGAs

Q4 Engineering

Journal of Electrical and Electronics Engineering Pub Date : 2023-09-29 DOI:10.37256/jeee.2220233421

Marcelo Delgado-del-Carpio, A. Hilario-Tacuri, Carlos A. Hernández-Gutiérrez

引用次数: 0

Abstract

This work presents the design of a microprocessor synthesized in FPGA based on the IEC 61131-3 standard. We report the architecture, and the operation of the internal hardware which allows the execution of Instruction List (IL). One of the most important components is the operands_selector block which allows memory elements, inputs, or outputs of the microprocessor to be treated as operands. Two ALUs are available to perform a bit, integer, and floating-point operations. The implementation of this microprocessor allows concluding that our designed microprocessor implemented in xc7a100tcsg324 (Xilinx) or EP4CE10E22C8 (Intel) FPGAs is superior in their execution times compared to the microprocessor evaluated in early studies and to one of the S7-1500 family processor.

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一种特定微处理器的建模与实现，以提高采用fpga的plc的性能

本文设计了一种基于iec61131 -3标准的FPGA合成微处理器。我们报告了架构，以及允许执行指令列表(IL)的内部硬件的操作。最重要的组件之一是operands_selector块，它允许将微处理器的内存元素、输入或输出视为操作数。有两个alu可用于执行位、整数和浮点操作。该微处理器的实现可以得出结论，我们设计的微处理器在xc7a100tcsg324 (Xilinx)或EP4CE10E22C8 (Intel) fpga中实现，与早期研究中评估的微处理器和S7-1500系列处理器之一相比，其执行时间优越。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Journal of Electrical and Electronics Engineering Engineering-Electrical and Electronic Engineering

CiteScore

0.90

自引率

0.00%

发文量

审稿时长

16 weeks

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