IMPLEMENTATION OF ARBITRARY BITNESS PERMUTATIONS BASED ON COMBINED CASCADES OF STRUCTURAL UNITS

Abstract

The most crucial aspects of permutations are their speed and ease of implementation. This article examines the implementation of arbitrary bitness permutations in computer engineering using a particular class of combination structures with linear complexity, namely, combined cascades of structural units. The reflection formed by this linear structure is identical to that of the corresponding Mealy finite state machine, which allows for the exploration of the properties of structural units and the cascade in the context of the theory of digital automata. The purpose of this permutation is to convert large volumes of data using hardware or software quickly and simply that can be used in various research fields. The paper investigates the bijectivity and equivalence of the reflection and presents an algorithm for constructing finitestate machines for both direct and inverted permutations, along with examples of state and output table construction. The article also provides examples of hardware implementation using field-programmable gate arrays and estimates the size of state and output tables for software implementation. The theoretical speed of bijective reflection transformations is calculated for both field-programmable gate arrays and software implementation, and the paper compares the speed of software implementations based on combined and one-dimensional cascades of constructive units. The practical verification of processing speed is made with software implementation. Finally, the article proposes areas of application for this arbitrary bitness permutation.