Low voltage low power sub-threshold operational amplifier in 180nm CMOS

Abstract

A two-stage operational amplifier for biomedical applications is presented in this paper. In the Op-Amp design, all transistors have been operated in sub-threshold region for low voltage low power application. The proposed Op-Amp has been designed based on TSMC foundry 180nm process and simulated in Cadence analog design environment. The proposed circuit generates a 40dB gain, 114 KHz UGBW, 72 deg phase margin & total power consumption is just 112nW with 0.8V battery.