Characterization and Electrical Modeling Including Trapping Effects of AIN/GaN HEMT 4×50μm on Silicon Substrate

Abstract

This paper reports the full characterization and modeling of novel AlN/GaN HEMTs on silicon using a short gate length. This device has been optimized for high frequency analog circuits applications. The presented model includes DC and small-signal modeling steps taking into account the trapping effects. It contains a trap model inside the current source which allows to accurately predict gate-lag transient response and low frequency dispersion of the output admittance. The model is validated by comparing the 4 GHz load-pull measurement results with the simulation ones.