Dae-gyu Park, Heung-Jae Cho, C. Lim, I. Yeo, J. Roh, Chung-Tae Kim, J. Hwang
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引用次数: 10
Abstract
This paper demonstrates characteristics of Al/sub 2/O/sub 3/ gate dielectric prepared by atomic layer deposition (ALD) for giga scale CMOS DRAM devices. Interface state density /spl sim/7/spl times/10/sup 10/ eV/sup -1/ cm/sup -2/ near the midgap and excellent reliability with a low gate leakage current were attained from Al/sub 2/O/sub 3//Si MOS system. p/nMOSFETs characteristics in terms of current drivability, transconductance (Gm), and subthreshold swing are described.