Jie Zhang, Wei Lu, Po-Tsang Huang, Sih-Han Li, Tsung-Yi Hung, Shih-Hsien Wu, M. Dai, I-Shan Chung, Wen-Chao Chen, Chin-Hung Wang, S. Sheu, Hung-Ming Chen, Kuan-Neng Chen, W. Lo, Chih-I Wu
{"title":"An Embedded Multi-Die Active Bridge (EMAB) Chip for Rapid-Prototype Programmable 2.5D/3D Packaging Technology","authors":"Jie Zhang, Wei Lu, Po-Tsang Huang, Sih-Han Li, Tsung-Yi Hung, Shih-Hsien Wu, M. Dai, I-Shan Chung, Wen-Chao Chen, Chin-Hung Wang, S. Sheu, Hung-Ming Chen, Kuan-Neng Chen, W. Lo, Chih-I Wu","doi":"10.1109/vlsitechnologyandcir46769.2022.9830188","DOIUrl":null,"url":null,"abstract":"2.5D/3D integration combines multiple dies or chiplets into a single package through a silicon interposer and through-silicon-vias (TSVs). However, the wire routing of redistribution layer (RDL) on an interposer is time-consuming and expensive. Therefore, this work demonstrates the first programmable 2.5D/3D integration by an embedded multi-die active bridge (EMAB) chip for fast 2.5D/3D prototype proof. The EMAB chip is a programmable bridge and realized by a checkboard and super highways to connect I/Os of multiple dies. The control of programmable switches in EMAB is based on the information stored in the one-time programming (OTP) memory. To further improving the data rates of switches in the checkboard and super highway, a forward body-bias control is utilized to reduce the turn-on resistance. The maximum data rate of the super highway is up to 1Gbps and the data rate of the checkboard is 100Mbps through 20 I/O blocks. The proposed programmable advanced package technology is a fast time-to-market and low-cost 2.5D/3D integration solution for various IoT applications.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830188","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
2.5D/3D integration combines multiple dies or chiplets into a single package through a silicon interposer and through-silicon-vias (TSVs). However, the wire routing of redistribution layer (RDL) on an interposer is time-consuming and expensive. Therefore, this work demonstrates the first programmable 2.5D/3D integration by an embedded multi-die active bridge (EMAB) chip for fast 2.5D/3D prototype proof. The EMAB chip is a programmable bridge and realized by a checkboard and super highways to connect I/Os of multiple dies. The control of programmable switches in EMAB is based on the information stored in the one-time programming (OTP) memory. To further improving the data rates of switches in the checkboard and super highway, a forward body-bias control is utilized to reduce the turn-on resistance. The maximum data rate of the super highway is up to 1Gbps and the data rate of the checkboard is 100Mbps through 20 I/O blocks. The proposed programmable advanced package technology is a fast time-to-market and low-cost 2.5D/3D integration solution for various IoT applications.