Compiler-agnostic Translation Validation

Abstract

The initial behavioral specification goes through significant optimizing transformations before being mapped to architecture during embedded system design. Establishing the validity of these transformations is crucial to ensure that the intended behavior of a system has not been faultily altered during synthesis. Although a lot of these transformations are carried out using some automated tool(s), a significant portion of such transformations are still performed by expert programmers. Thus, there is a need to devise efficient translation validation methodologies to handle diverse code transformations. Many translation validation methods exist which depend on hints provided by the compiler, such as, what transformations have been applied and in what order. However, generating such hints requires a lot of tedious probing into the compilers; the task becomes more demanding when there are humans involved. In this tutorial, we intend to present our translation validation framework to check equivalence between a source program and its transformed version, both represented using the control and data flow graph (CDFG) or Finite State Machine with Data path (FSMD) model or its extension, while being completely unaware of the underlying compiler. The tutorial will start with illustrating common compiler optimization techniques with their impact on performance in terms of power, area and timing. Next, we will discuss basic program verification techniques like Hoare logic, Theorem Proving, Model Checking, Program equivalence using SMT solvers, etc. We will show why equivalence checking method is most suitable for verifying compiler optimizations. Next, we will present our FSMD based equivalence checking method in detail. Next, we will discuss how bisimulation relations can be inferred from equivalence checkers. We conclude with discussing the future direction of research in this domain.