Lai Wei, Zihao Zheng, N. Markulić, J. Lagos, E. Martens, Yan Zhu, Chi-Hang Chan, J. Craninckx, R. Martins
{"title":"An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC","authors":"Lai Wei, Zihao Zheng, N. Markulić, J. Lagos, E. Martens, Yan Zhu, Chi-Hang Chan, J. Craninckx, R. Martins","doi":"10.23919/VLSICircuits52068.2021.9492336","DOIUrl":null,"url":null,"abstract":"This paper presents an auxiliary-channel-assisted background calibration for ADC’s input front-end (buffer + T/H) distortion and inter-stage gain error. The auxiliary channel is custom-designed which runs at a fractional speed of the main ADC with only moderate noise performance but high linearity. It also has a pseudo inter-stage gain characteristic as the main ADC, which incorporates with the multi-layer LMS procedure, facilitating a fast convergence speed. Verified in a 12-bit 1GS/s pipelined SAR ADC in 28nm CMOS, the SNDR and SFDR at Nyquist input are 59.28 dB and 67.09 dB SFDR, respectively. Just the distortion calibrations alone contribute >11.13dB SFDR improvement in the entire Nyquist band. Both the ADCs and input buffers work under a 1V supply, consuming 19.2mW with 17% from the buffer.","PeriodicalId":106356,"journal":{"name":"2021 Symposium on VLSI Circuits","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSICircuits52068.2021.9492336","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents an auxiliary-channel-assisted background calibration for ADC’s input front-end (buffer + T/H) distortion and inter-stage gain error. The auxiliary channel is custom-designed which runs at a fractional speed of the main ADC with only moderate noise performance but high linearity. It also has a pseudo inter-stage gain characteristic as the main ADC, which incorporates with the multi-layer LMS procedure, facilitating a fast convergence speed. Verified in a 12-bit 1GS/s pipelined SAR ADC in 28nm CMOS, the SNDR and SFDR at Nyquist input are 59.28 dB and 67.09 dB SFDR, respectively. Just the distortion calibrations alone contribute >11.13dB SFDR improvement in the entire Nyquist band. Both the ADCs and input buffers work under a 1V supply, consuming 19.2mW with 17% from the buffer.