S. Mehta, S. Ahmed, S. Al-Ashari, Dennis Chen, D. Chen, S. Cokmez, R. Eltejaein, P. Fu, J. Gee, T. Granvold, A. Iyer, A. K. Lin, G. Maturana, D. McConn, H. Mohammed, Jamshid Mostoufi, A. Moudgal, S. Nori, G. Peterson, M. Splain, T. Yu
{"title":"Verification of the UltraSPARC microprocessor","authors":"S. Mehta, S. Ahmed, S. Al-Ashari, Dennis Chen, D. Chen, S. Cokmez, R. Eltejaein, P. Fu, J. Gee, T. Granvold, A. Iyer, A. K. Lin, G. Maturana, D. McConn, H. Mohammed, Jamshid Mostoufi, A. Moudgal, S. Nori, G. Peterson, M. Splain, T. Yu","doi":"10.1109/CMPCON.1995.512422","DOIUrl":null,"url":null,"abstract":"The overall verification approach used in the design and development of the full custom 64 bit UltraSPARC microprocessor is described. A balanced hierarchical approach is critical in validating a design with this level of complexity. The tools, developed internally and externally, which aided the verification effort are also described. The environment is flexible enough to support various revisions of major tools. The method developed could easily be applied to derivative and next generation microprocessors.","PeriodicalId":415918,"journal":{"name":"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. COMPCON'95. Technologies for the Information Superhighway","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPCON.1995.512422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
The overall verification approach used in the design and development of the full custom 64 bit UltraSPARC microprocessor is described. A balanced hierarchical approach is critical in validating a design with this level of complexity. The tools, developed internally and externally, which aided the verification effort are also described. The environment is flexible enough to support various revisions of major tools. The method developed could easily be applied to derivative and next generation microprocessors.