{"title":"SIMOX material characterization by the transient capacitance technique","authors":"A. Bahraman, J. Geneczko, M. Moriwaki","doi":"10.1109/SOI.1988.95401","DOIUrl":null,"url":null,"abstract":"Summary form only given. A simple method for evaluating SIMOX (separation by implantation oxygen) material by measuring the effective carrier generation lifetime in the regions above and below the buried oxide, using standard transient capacitance techniques, has been developed. For SIMOX wafers, the epilayer above the buried oxide typically has sheet resistance values on the order of approximately 2*10/sup 4/ Omega / Square Operator . This resistance limits the application of the transient capacitance technique to gate oxide capacitors in a MOS/SOI process. By making a long and narrow MOS capacitor with an n/sup +/ guard band, it has been possible to reduce the effective series resistance of the capacitor to a few hundred ohms, thereby making the transient capacitance technique applicable to measuring lifetime in the thin epilayer above the buried oxide. The gate oxide capacitors were fabricated as part of a polysilicon gate CMOS-on-SOI process. Data were obtained for SOI samples with oxygen doses in the range 1.4-1.9*10/sup 18//cm/sup 2/. For example, for an Eaton-implanted wafer, the measured effective lifetime in the top epitaxial layer was 0.34 mu s; in the bulk beneath the buried oxide, the lifetime was 1.6 mu s. Comparable bulk wafer and epi-on-bulk wafer lifetimes were 22 mu s and 14 mu s. The results indicate that the technique is an effective method for evaluating SOI materials.<<ETX>>","PeriodicalId":391934,"journal":{"name":"Proceedings. SOS/SOI Technology Workshop","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SOS/SOI Technology Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1988.95401","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Summary form only given. A simple method for evaluating SIMOX (separation by implantation oxygen) material by measuring the effective carrier generation lifetime in the regions above and below the buried oxide, using standard transient capacitance techniques, has been developed. For SIMOX wafers, the epilayer above the buried oxide typically has sheet resistance values on the order of approximately 2*10/sup 4/ Omega / Square Operator . This resistance limits the application of the transient capacitance technique to gate oxide capacitors in a MOS/SOI process. By making a long and narrow MOS capacitor with an n/sup +/ guard band, it has been possible to reduce the effective series resistance of the capacitor to a few hundred ohms, thereby making the transient capacitance technique applicable to measuring lifetime in the thin epilayer above the buried oxide. The gate oxide capacitors were fabricated as part of a polysilicon gate CMOS-on-SOI process. Data were obtained for SOI samples with oxygen doses in the range 1.4-1.9*10/sup 18//cm/sup 2/. For example, for an Eaton-implanted wafer, the measured effective lifetime in the top epitaxial layer was 0.34 mu s; in the bulk beneath the buried oxide, the lifetime was 1.6 mu s. Comparable bulk wafer and epi-on-bulk wafer lifetimes were 22 mu s and 14 mu s. The results indicate that the technique is an effective method for evaluating SOI materials.<>