A pipelined VLSI NEXT canceller for premises applications

G. Im, Naresh R Shanbhag
{"title":"A pipelined VLSI NEXT canceller for premises applications","authors":"G. Im, Naresh R Shanbhag","doi":"10.1109/GLOCOM.1994.513024","DOIUrl":null,"url":null,"abstract":"A near-end crosstalk (NEXT) canceller using a fine-grain pipelined architecture is presented. The architecture is derived by the application of the relaxed look-ahead technique. This technique is an approximation to the look-ahead technique and results in a minimal hardware overhead. Performance of the proposed algorithm is demonstrated for NEXT cancellers used in a 125 Mb/s twisted-pair distributed data interface (TPDDI) and the 155 Mb/s asynchronous transfer mode (ATM) local area network (LAN) applications. It is shown that the proposed pipelined architecture can be clocked at a rate of 107 times faster than the serial architecture with a maximum of 2.0 dB loss in the signal-to-noise ratio (SNR) for both the TPDDI and the ATM LAN applications.","PeriodicalId":323626,"journal":{"name":"1994 IEEE GLOBECOM. Communications: The Global Bridge","volume":"88 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1994 IEEE GLOBECOM. Communications: The Global Bridge","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLOCOM.1994.513024","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

A near-end crosstalk (NEXT) canceller using a fine-grain pipelined architecture is presented. The architecture is derived by the application of the relaxed look-ahead technique. This technique is an approximation to the look-ahead technique and results in a minimal hardware overhead. Performance of the proposed algorithm is demonstrated for NEXT cancellers used in a 125 Mb/s twisted-pair distributed data interface (TPDDI) and the 155 Mb/s asynchronous transfer mode (ATM) local area network (LAN) applications. It is shown that the proposed pipelined architecture can be clocked at a rate of 107 times faster than the serial architecture with a maximum of 2.0 dB loss in the signal-to-noise ratio (SNR) for both the TPDDI and the ATM LAN applications.
用于内部应用的流水线VLSI NEXT取消器
提出了一种采用细粒度流水线结构的近端串扰(NEXT)消除器。该体系结构是通过应用放松的前瞻性技术推导出来的。这种技术是一种近似于预检技术的技术,其结果是最小的硬件开销。在125 Mb/s双绞线分布式数据接口(TPDDI)和155 Mb/s异步传输模式(ATM)局域网(LAN)应用中,验证了该算法的性能。结果表明,在TPDDI和ATM局域网应用中,所提出的流水线架构的时钟速率比串行架构快107倍,信噪比(SNR)损失最大为2.0 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信