{"title":"A pipelined VLSI NEXT canceller for premises applications","authors":"G. Im, Naresh R Shanbhag","doi":"10.1109/GLOCOM.1994.513024","DOIUrl":null,"url":null,"abstract":"A near-end crosstalk (NEXT) canceller using a fine-grain pipelined architecture is presented. The architecture is derived by the application of the relaxed look-ahead technique. This technique is an approximation to the look-ahead technique and results in a minimal hardware overhead. Performance of the proposed algorithm is demonstrated for NEXT cancellers used in a 125 Mb/s twisted-pair distributed data interface (TPDDI) and the 155 Mb/s asynchronous transfer mode (ATM) local area network (LAN) applications. It is shown that the proposed pipelined architecture can be clocked at a rate of 107 times faster than the serial architecture with a maximum of 2.0 dB loss in the signal-to-noise ratio (SNR) for both the TPDDI and the ATM LAN applications.","PeriodicalId":323626,"journal":{"name":"1994 IEEE GLOBECOM. Communications: The Global Bridge","volume":"88 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1994 IEEE GLOBECOM. Communications: The Global Bridge","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLOCOM.1994.513024","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A near-end crosstalk (NEXT) canceller using a fine-grain pipelined architecture is presented. The architecture is derived by the application of the relaxed look-ahead technique. This technique is an approximation to the look-ahead technique and results in a minimal hardware overhead. Performance of the proposed algorithm is demonstrated for NEXT cancellers used in a 125 Mb/s twisted-pair distributed data interface (TPDDI) and the 155 Mb/s asynchronous transfer mode (ATM) local area network (LAN) applications. It is shown that the proposed pipelined architecture can be clocked at a rate of 107 times faster than the serial architecture with a maximum of 2.0 dB loss in the signal-to-noise ratio (SNR) for both the TPDDI and the ATM LAN applications.