Implementation of True Random Number Generator based on Double-Scroll Attractor circuit with GST memristor emulator

Abstract

The cryptographic security provided by various techniques of random number generator (RNG) construction is one of the developing research areas today. Among various types of RNG, the true random bit generator (TRBG) can be considered as the most unpredictable and most secure because its randomness seed is generated from chaotic sources. This paper proposes a design of TRBG model based on double-scroll attractors circuits with GST memristor. After implementation and simulation of the chaotic circuit with GST memristor emulator, the chaotic behavior of the output voltage and inductor current were received. Moreover, their dependence on the input voltage revealed the close to double-scroll form. The randomness generated from the proposed circuit was tested by analysis of the Fast Fourier Transform (FFT) and Lyapunov exponents of the output voltage.