A Low Power and Low Noise Voltage-Controlled Oscillator in 28-nm FDSOI Technology for Wireless Communication Applications

Abstract

A 28-nm CMOS (FDSOI) technology is used to design and simulate the VCO presented in this paper. The tuning range of the proposed design is from 0.309 GHz to 2.92 GHz (about 161.75% tuning) with the power dissipation of 3.73 mW, at a supply voltage of 1V. In the frequency range from 0.309 to 2.92 GHz, the lowest phase noise result is -126.53 dBc/Hz at 1 MHz offset from centered oscillating frequency of 1.613 GHz. These results lead to an excellent Figure of Merit (FoM) of -184.97 dBc/Hz. A variable bias current approach is used to control the oscillation frequency. Current mirror circuit has been used to maintain wide tuning range, low power dissipation and reasonable low phase noise.