Lower bounds for monotone arithmetic circuits via communication complexity

A. Chattopadhyay, Rajit Datta, P. Mukhopadhyay
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引用次数: 9

Abstract

Valiant (1980) showed that general arithmetic circuits with negation can be exponentially more powerful than monotone ones. We give the first improvement to this classical result: we construct a family of polynomials Pn in n variables, each of its monomials has non-negative coefficient, such that Pn can be computed by a polynomial-size depth-three formula but every monotone circuit computing it has size 2Ω(n1/4/log(n)). The polynomial Pn embeds the SINK∘ XOR function devised recently by Chattopadhyay, Mande and Sherif (2020) to refute the Log-Approximate-Rank Conjecture in communication complexity. To prove our lower bound for Pn, we develop a general connection between corruption of combinatorial rectangles by any function f ∘ XOR and corruption of product polynomials by a certain polynomial Pf that is an arithmetic embedding of f. This connection should be of independent interest. Using further ideas from communication complexity, we construct another family of set-multilinear polynomials fn,m such that both Fn,m − є· fn,m and Fn,m + є· fn,m have monotone circuit complexity 2Ω(n/log(n)) if є ≥ 2− Ω( m ) and Fn,m ∏i=1n (xi,1 +⋯+xi,m), with m = O( n/logn ). The polynomials fn,m have 0/1 coefficients and are in VNP. Proving such lower bounds for monotone circuits has been advocated recently by Hrubeš (2020) as a first step towards proving lower bounds against general circuits via his new approach.
基于通信复杂度的单调算术电路下界
Valiant(1980)证明了带负的一般算术电路可以比单调电路在指数上更强大。我们给出了这个经典结果的第一个改进:我们在n个变量中构造了一个多项式Pn族,它的每个单项式都有非负系数,这样Pn可以通过一个多项式大小的深度三公式来计算,但是每个单调电路计算它的大小都是2Ω(n1/4/log(n))。多项式Pn嵌入了最近由Chattopadhyay、Mande和Sherif(2020)设计的SINK∘XOR函数,以反驳通信复杂性中的Log-Approximate-Rank猜想。为了证明Pn的下界,我们在任意函数f°XOR对组合矩形的破坏和乘积多项式对某个多项式Pf的破坏之间建立了一个普遍的联系,Pf是f的算术嵌入。这种联系应该是独立的。利用通信复杂性的进一步思想,我们构造了另一个集多元线性多项式fn,m族,使得fn,m−−−·fn,m和fn,m +·fn,m具有单调电路复杂度2Ω(n/log(n)),如果n≥2−Ω(m)和fn,m∏i=1n (xi,1 +⋯+xi,m), m = O(n/logn)。多项式fn m系数为0/1,属于VNP。hrubesi(2020)最近提倡证明单调电路的下界,作为通过他的新方法证明一般电路下界的第一步。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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