Integrated distributed amplifier with passive-free input driver

Abstract

High efficiency amplifier operation (class-D, E and S) conceptually approaches an ideal switched transistor model. Driver signals are of sufficient level to ensure that the devices are saturated and cut off during the proper parts of the RF cycle. Conventional sine wave input signals are generated with lower efficiency cascaded power gain stages. Deep sub-micron CMOS technology and improved power device input terminal parameters, have created a novel opportunity for a new switching signal driver design approach. This can be extended to distributed power amplifier application to replace the passive lumped transmission line input network with an integrated active solution.