{"title":"Design and analysis of 1–60GHz, RF CMOS peak detectors for LNA calibration","authors":"Karthik Jayaraman, Q. Khan, P. Chiang, B. Chi","doi":"10.1109/VDAT.2009.5158157","DOIUrl":null,"url":null,"abstract":"A CMOS peak detector for 1–60GHz RF applications is presented. This peak detector tracks the output voltage of a LNA/VCO and the measured signal is used to tune the LNA/VCO to the desired frequency. Different peak detector circuit topologies are analyzed and their performance metrics such as gain, bandwidth and nature of response are compared. The peak detectors were designed for low (2.4GHz) and high (55–60 GHz) frequency application and tested using two sample LNAs at their respective frequencies. While one of the proposed CMOS peak detectors (90nm) exploits the higher ƒT to achieve 60GHz operation with optimal power consumption and area overhead, the other low frequency peak detector was designed in 180nm CMOS. The peak detector is compared with the state of the art detectors. The main advantage of this detector is its minimal area overhead and power consumption.","PeriodicalId":246670,"journal":{"name":"2009 International Symposium on VLSI Design, Automation and Test","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2009.5158157","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
A CMOS peak detector for 1–60GHz RF applications is presented. This peak detector tracks the output voltage of a LNA/VCO and the measured signal is used to tune the LNA/VCO to the desired frequency. Different peak detector circuit topologies are analyzed and their performance metrics such as gain, bandwidth and nature of response are compared. The peak detectors were designed for low (2.4GHz) and high (55–60 GHz) frequency application and tested using two sample LNAs at their respective frequencies. While one of the proposed CMOS peak detectors (90nm) exploits the higher ƒT to achieve 60GHz operation with optimal power consumption and area overhead, the other low frequency peak detector was designed in 180nm CMOS. The peak detector is compared with the state of the art detectors. The main advantage of this detector is its minimal area overhead and power consumption.