Package characterization and development of a flip chip QFN package: fcMLF

D. Mccann, Su-Min Ha
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引用次数: 16

Abstract

Describes the performance of a low cost molded package using flip chip interconnections on a copper lead frame substrate. Two flip chip interconnect metallurgies were evaluated: High Pb bumps attached to the lead frame using eutectic Sn37Pb solder paste; Au bumps attached to the leadframe using eutectic Sn3.5Ag solder paste. This package format is identified as the flip chip MicroLeadframe (fcMLF) package family (QFN) in this presentation. Temperature cycle, HAST, storage, and MRT testing were performed. All reliability requirements were achieved. Level 1 260/spl deg/C J-STD-020A moisture classification was achieved. This fcMLF package was also evaluated with and without an exposed thermal pad. Electrical model simulations were completed showing the package was applicable for use up to 40 GHz, depending upon die to package size ratio. Thermal models were completed that demonstrated thermal dissipation of 35/spl deg/C/W theta JA for a 4.00 /spl times/ 4.00 mm body size with an exposed pad.
倒装QFN封装的封装特性和开发:fcMLF
介绍在铜引线框架基板上使用倒装芯片互连的低成本模制封装的性能。对两种倒装芯片互连材料进行了评价:采用共晶Sn37Pb锡膏将高铅凸点附着在引线框架上;使用共晶Sn3.5Ag锡膏将Au凸起连接到引线框架上。这种封装格式在本报告中被确定为倒装芯片MicroLeadframe (fcMLF)封装家族(QFN)。进行温度循环、HAST、储存和MRT测试。所有的可靠性要求都达到了。达到1级260/spl℃J-STD-020A水分分级。该fcMLF封装也进行了评估,有无暴露的热垫。电气模型仿真已经完成,显示该封装适用于高达40 GHz的使用,具体取决于芯片与封装的尺寸比。完成的热模型显示,在4.00 /spl次/ 4.00 mm的外露垫尺寸下,35/spl度/C/W θ JA的散热。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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