A 250Mbps 100kV/µs CMTI On-Chip Double-Isolated Transformer-Based Digital Isolator

Abstract

This paper presents a double-isolated on-chip transformer-based digital isolator exploiting integrated double SiO2 galvanic barriers to achieve an isolation rate of 4kV. The isolator employs pulse polarity modulation to reduce the power consumption while maintaining a high data rate and high common mode transient immunity (CMTI). Simulation results show that the proposed isolator achieves a 250Mbps maximum data rate with a 5ns propagation delay and a 100kV/µs CMTI performance. With a load of 15pF, TX and RX consume 0.32mA and 3.4mA currents at a 1Mbps data rate and 11.7mA and 3.5mA currents at a 250Mbps data rate, respectively.