Concurrent fault and design error simulation in interactive simulation automation system

Abstract

This paper provides efficient design verification methodologies based on concurrent simulation technique which is implemented in the interactive simulation automation system (ISAS). Concurrent simulation is not a new technique, however, the ISAS exploits many parallelisms during the simulation procedure and applies it to three different types of simulation: concurrent (C_sim), distributed concurrent (Dc_sim), and concurrent-concurrent (CON/sup 2/FERS). ISAS automates the simulation procedure with a graphic user interface and handles not only fault models, but also design error models. It generates fault and design error coverage metrics for the user. This paper provides a description of three types of concurrent simulators with performance results.