A Low-Power Cryptographic Coprocessor Design for the Internet of Things

Abstract

This article presents the design of a low-power cryptographic coprocessor for Internet of Things (IoT) and sensing applications based on the recharacterization of digital cells to operate below nominal voltage. The design is implemented in XFAB 180nm technology with 1V CORE voltage, achieving a 60% reduction in power and 11% in area compared to its implementation at a nominal voltage of 1.8V. This shows the effectiveness of the strategy in power optimization, allowing the use of low cost technologies to develop efficient IoT and Smart Sensors embedded systems.