Improved Design of High-Radix Signed-Digit Adders

Abstract

High speed adders are very important in computer arithmetic such that a small improvement in the performance of adders has a great impact on other operations. A way to speed up the adders is to eliminate carry propagation by using carry-free adders. In this paper we improve the fastest previous carry-free adder by changing the transfer digit-set to [-2,1]. It is shown that this small change leads to a simpler signed-digit adder which consumes lower area/power than the fastest previous work while not increasing the latency.