Planar GaAs integrated circuits fabricated by ion implantation

B. Welch, R. Eden
{"title":"Planar GaAs integrated circuits fabricated by ion implantation","authors":"B. Welch, R. Eden","doi":"10.1109/IEDM.1977.189206","DOIUrl":null,"url":null,"abstract":"A unique fabrication technology is described for planar ion implanted GaAs integrated circuits. The planar processing techniques presented are compatible with any GaAs IC logic approach and promise fabrication yields compatible with the long-term goals of LSI circuit complexities. Planar depletion-mode GaAs ICs have been fabricated using multiple localized implantations directly into semi-insulating GaAs substrates. Fabrication techniques for the fine-line circuit lithography include the utilization of a 4× projection mask aligner. Performance of planar GaAs NOR gates exhibit excellent switching characteristics and low power levels.","PeriodicalId":218912,"journal":{"name":"1977 International Electron Devices Meeting","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1977 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1977.189206","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25

Abstract

A unique fabrication technology is described for planar ion implanted GaAs integrated circuits. The planar processing techniques presented are compatible with any GaAs IC logic approach and promise fabrication yields compatible with the long-term goals of LSI circuit complexities. Planar depletion-mode GaAs ICs have been fabricated using multiple localized implantations directly into semi-insulating GaAs substrates. Fabrication techniques for the fine-line circuit lithography include the utilization of a 4× projection mask aligner. Performance of planar GaAs NOR gates exhibit excellent switching characteristics and low power levels.
离子注入制备平面砷化镓集成电路
介绍了一种独特的平面离子注入砷化镓集成电路的制备工艺。提出的平面处理技术与任何GaAs集成电路逻辑方法兼容,并且保证了与LSI电路复杂性的长期目标兼容的制造产量。在半绝缘的GaAs衬底上直接植入多个局域植入,制备了平面耗尽模式GaAs集成电路。细线电路光刻的制造技术包括使用4×投影掩模对准器。平面GaAs NOR门具有优良的开关特性和低功率水平。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信