Multipliers Using Low Power Adder Cells Using 180nm Technology

Abstract

Multiplier is the most commonly used circuit in the digital devices. Multiplication is one of the basic functions used in digital signal processing. Most high performance DSP systems rely on hardware multiplication to achieve high data throughput. There are various types of multipliers available depending upon the application in which they are used. Full adder is the main block of power dissipation in multiplier. So reducing the power dissipation of full adder ultimately reduces the power dissipation of multiplier. In this article 8-bit multipliers based on Gate Diffusion Input (GDI) adder cells are compared using EDA Tanner, simulations are based on 180nm CMOS technology.