Yiwen Su, Zhiguo Bao, Fangfang Wang, Takahiro Watanabe
{"title":"Efficient GA Approach Combined with Taguchi Method for Mixed Constrained Circuit Design","authors":"Yiwen Su, Zhiguo Bao, Fangfang Wang, Takahiro Watanabe","doi":"10.1109/ICCSA.2011.44","DOIUrl":null,"url":null,"abstract":"This paper proposes a new circuit design optimization method where Genetic Algorithm (GA) with parameterized uniform crossover (GApuc) is combined with Taguchi method. The purposed are (a) using Taguchi method to search for optimal fitness value and (b) evaluating the power and signal delay of logic blocks in circuit design to get an optimum circuit in complexity, power and signal delay. The present study enhances the previous results by providing a much more detailed examination of mixed constrained circuit design. Experimental results show that our proposed approach can produce a good circuit in both fitness function and CPU time.","PeriodicalId":428638,"journal":{"name":"2011 International Conference on Computational Science and Its Applications","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Conference on Computational Science and Its Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCSA.2011.44","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper proposes a new circuit design optimization method where Genetic Algorithm (GA) with parameterized uniform crossover (GApuc) is combined with Taguchi method. The purposed are (a) using Taguchi method to search for optimal fitness value and (b) evaluating the power and signal delay of logic blocks in circuit design to get an optimum circuit in complexity, power and signal delay. The present study enhances the previous results by providing a much more detailed examination of mixed constrained circuit design. Experimental results show that our proposed approach can produce a good circuit in both fitness function and CPU time.