A dynamic programming approach to complex allocation in a DSP pipelined processor

R. Muresan, C. Gebotys
{"title":"A dynamic programming approach to complex allocation in a DSP pipelined processor","authors":"R. Muresan, C. Gebotys","doi":"10.1109/CCECE.2001.933608","DOIUrl":null,"url":null,"abstract":"This paper describes a deterministic non-serial dynamic programming technique applicable to a code optimization problem for the Star Core 140 (SC140) DSP processor. The code optimization problem analyzed is an optimal register allocation problem that minimizes the expected number of execution sets with a two-word prefix for the SC140 core applications based on two probabilistic allocation policies. We introduce two basic algorithms, a linear bridging algorithm and a non-linear bridging algorithm (supporting loops), that solve the specific register allocation problem for an assembly language code block. All algorithms and methods are applied to a variety of SC140 assembly code applications. The optimized assembly language codes generated show an average of 68%, improvement in overheads and an average of 4.44% code size reduction at a very small increase in the CPU time costs. The basic principles and methods developed throughout this research are general and are applicable to other pipelined processors.","PeriodicalId":184523,"journal":{"name":"Canadian Conference on Electrical and Computer Engineering 2001. Conference Proceedings (Cat. No.01TH8555)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Canadian Conference on Electrical and Computer Engineering 2001. Conference Proceedings (Cat. No.01TH8555)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCECE.2001.933608","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

This paper describes a deterministic non-serial dynamic programming technique applicable to a code optimization problem for the Star Core 140 (SC140) DSP processor. The code optimization problem analyzed is an optimal register allocation problem that minimizes the expected number of execution sets with a two-word prefix for the SC140 core applications based on two probabilistic allocation policies. We introduce two basic algorithms, a linear bridging algorithm and a non-linear bridging algorithm (supporting loops), that solve the specific register allocation problem for an assembly language code block. All algorithms and methods are applied to a variety of SC140 assembly code applications. The optimized assembly language codes generated show an average of 68%, improvement in overheads and an average of 4.44% code size reduction at a very small increase in the CPU time costs. The basic principles and methods developed throughout this research are general and are applicable to other pipelined processors.
DSP流水线处理器中复杂分配的动态规划方法
本文介绍了一种适用于SC140 DSP处理器代码优化问题的确定性非串行动态规划技术。所分析的代码优化问题是一个最优寄存器分配问题,该问题基于两种概率分配策略,使SC140核心应用程序具有两个字前缀的执行集的预期数量最小化。我们介绍了两种基本算法,线性桥接算法和非线性桥接算法(支持循环),用于解决汇编语言代码块的特定寄存器分配问题。所有的算法和方法都适用于各种SC140汇编代码的应用。优化后生成的汇编语言代码平均减少了68%的开销,平均减少了4.44%的代码大小,而CPU时间成本只增加了很小的一部分。在整个研究过程中开发的基本原理和方法是通用的,适用于其他流水线处理器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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