{"title":"Analysis of a switching fabric employing direct interconnection networks","authors":"Xudong Zhu, Hong Wang, Le Min Li","doi":"10.1109/PDCAT.2003.1236254","DOIUrl":null,"url":null,"abstract":"A k-ary n-cube direct interconnection structure is originally introduced and developed in the context of massively parallel computer (MPC) architectures. In recent years, with the development of VLSI (very large scale integration) technology and requirements of high performance Internet routers/switches, the k-ary n-cube interconnection network is considered to build Terabit routers. Analysis model for three-dimensional torus is presented as switch cores of Internet routes. Delay/throughput characteristics are measured with four different routing algorithms, buffer length and scale of fabric. Also a new algorithm Ladder is presented. All simulation experiments are done on OPNET. Results show that this architecture can build high performance routers. Compared to other routing algorithms, Ladder has better performance.","PeriodicalId":145111,"journal":{"name":"Proceedings of the Fourth International Conference on Parallel and Distributed Computing, Applications and Technologies","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Fourth International Conference on Parallel and Distributed Computing, Applications and Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PDCAT.2003.1236254","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A k-ary n-cube direct interconnection structure is originally introduced and developed in the context of massively parallel computer (MPC) architectures. In recent years, with the development of VLSI (very large scale integration) technology and requirements of high performance Internet routers/switches, the k-ary n-cube interconnection network is considered to build Terabit routers. Analysis model for three-dimensional torus is presented as switch cores of Internet routes. Delay/throughput characteristics are measured with four different routing algorithms, buffer length and scale of fabric. Also a new algorithm Ladder is presented. All simulation experiments are done on OPNET. Results show that this architecture can build high performance routers. Compared to other routing algorithms, Ladder has better performance.