Rapid Prototyping of an Improved Cholesky Decomposition Based MIMO Detector on FPGAs

Abstract

Multiple Input Multiple Output (MIMO) has gradually become the most promising technique for next generation wireless telecommunication systems. MMSE-VBLAST is a MIMO detection algorithm which has a performance close to the Maximum Likelihood with considerably low complexity. The improvements in the algorithm presented in this paper result in substantial computation savings which in turn leads to substantial hardware savings, as it avoids the expensive hardware cost of square root and division operations. This improvement decreases the computational complexity of MMSE-VBLAST with no performance penalty compared to previous MMSE-VBLAST algorithms. This has been validated for 2x2 and 4x4 MIMO systems using a rapid prototyping methodology that starts with pure software formulation in MATLAB and ends with an optimized equivalent FPGA hardware implementation.