{"title":"A Programmable Circuit Based on the Combination of VTM Cellular Crossbars","authors":"Farzad Mozafari, Mehdi Ahmadi, Arash Ahmadi","doi":"10.1109/SMACD58065.2023.10192103","DOIUrl":null,"url":null,"abstract":"This paper proposes a design of a programmable circuit based on the combination of crossbar arrays using the VTM-NAND/AND logic gates. The novelty of this work is the utilization pipeline technique for the proposed arrangements. The important feature of this method is multiple instructions overlap during execution where designed cells will never be idle, that causes an increase in the number of instructions executed simultaneously and speed of calculations. All of the digital gates and proposed circuits are evaluated using an advanced memristor model with a modified Biolek window and a voltage-dependent variable exponent.","PeriodicalId":239306,"journal":{"name":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMACD58065.2023.10192103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a design of a programmable circuit based on the combination of crossbar arrays using the VTM-NAND/AND logic gates. The novelty of this work is the utilization pipeline technique for the proposed arrangements. The important feature of this method is multiple instructions overlap during execution where designed cells will never be idle, that causes an increase in the number of instructions executed simultaneously and speed of calculations. All of the digital gates and proposed circuits are evaluated using an advanced memristor model with a modified Biolek window and a voltage-dependent variable exponent.