Cryo-CMOS Compact Modeling

C. Enz, A. Beckers, F. Jazaeri
{"title":"Cryo-CMOS Compact Modeling","authors":"C. Enz, A. Beckers, F. Jazaeri","doi":"10.1109/IEDM13553.2020.9371894","DOIUrl":null,"url":null,"abstract":"This paper highlights some of the challenges faced for the modeling of MOSFET devices for operation at cryogenic temperature (CT). A special focus is given on the modeling of the threshold voltage VT and the subthreshold swing SS. The significant increase of VT at CT reduces the available overdrive voltage and therefore needs to be modeled properly. The SS saturates to a constant value below a critical temperature Tc of typically 40 K. This mitigates the current saving that could be expected from reducing the temperature since the transconductance for a given current does not scale inversely with 1/T below Tc. A correct modeling of these two phenomena is therefore key for developing an improved compact model (CM) that scales with T from RT down to CT.","PeriodicalId":415186,"journal":{"name":"2020 IEEE International Electron Devices Meeting (IEDM)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Electron Devices Meeting (IEDM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM13553.2020.9371894","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13

Abstract

This paper highlights some of the challenges faced for the modeling of MOSFET devices for operation at cryogenic temperature (CT). A special focus is given on the modeling of the threshold voltage VT and the subthreshold swing SS. The significant increase of VT at CT reduces the available overdrive voltage and therefore needs to be modeled properly. The SS saturates to a constant value below a critical temperature Tc of typically 40 K. This mitigates the current saving that could be expected from reducing the temperature since the transconductance for a given current does not scale inversely with 1/T below Tc. A correct modeling of these two phenomena is therefore key for developing an improved compact model (CM) that scales with T from RT down to CT.
Cryo-CMOS紧凑建模
本文重点介绍了在低温下工作的MOSFET器件建模所面临的一些挑战。特别关注阈值电压VT和亚阈值摆幅SS的建模。VT在CT处的显著增加降低了可用的超速电压,因此需要适当建模。SS饱和到一个恒定的值低于临界温度Tc通常为40k。由于给定电流的跨导在低于Tc的情况下不会与1/T成反比,因此这减轻了降低温度可能带来的电流节省。因此,这两种现象的正确建模是开发改进的紧凑型模型(CM)的关键,该模型随T从RT降至CT。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信