A Nanosecond–Level Hybrid Table Design for Financial Market Data Generators

H. Fu, Conghui He, W. Luk, Weijia Li, Guangwen Yang
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引用次数: 1

Abstract

This paper proposes a hybrid sorted table design for minimizing electronic trading latency, with three main contributions. First, a hierarchical sorted table with two levels, a fast cache table in reconfigurable hardware storing megabytes of data items and a master table in software storing gigabytes of data items. Second, a full set of operations, including insertion, deletion, selection and sorting, for the hybrid table with latency in a few cycles. Third, an on-demand synchronization scheme between the cache table and the master table. An implementation has been developed that targets an FPGA-based network card in the environment of the China Financial Futures Exchange (CFFEX) which sustains 1-10Gb/s bandwidth with latency of 400 to 700 nanoseconds, providing an 80- to 125-fold latency reduction compared to a fully optimized CPU-based solution, and a 2.2-fold reduction over an existing FPGA-based solution.
金融市场数据生成器的纳秒级混合表设计
本文提出了一种混合排序表设计,以最大限度地减少电子交易延迟,主要有三个贡献。首先,一个有两层的分层排序表,可重构硬件中的快速缓存表存储mb级的数据项,软件中的主表存储gb级的数据项。其次,对混合表进行完整的操作,包括插入、删除、选择和排序,延迟在几个周期内。第三,缓存表和主表之间的按需同步方案。针对中国金融期货交易所(CFFEX)环境中基于fpga的网卡,开发了一种实现方案,该方案可维持1-10Gb/s的带宽,延迟为400至700纳秒,与完全优化的基于cpu的解决方案相比,延迟减少80至125倍,比现有的基于fpga的解决方案减少2.2倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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