{"title":"A high-frequency custom CMOS S/390 microprocessor","authors":"C. Webb, J. Liptay","doi":"10.1109/ICCD.1997.628874","DOIUrl":null,"url":null,"abstract":"The S/390 G4 CMOS processor is an implementation of the IBM ESA/390 architecture on a single custom CMOS chip. It is a new design which uses a straightforward pipeline both to achieve a fast cycle time and to speed the design cycle. The complex instructions are implemented using a highly privileged subroutines called millicode. To achieve high data integrity while maintaining a high clock frequency, the chip contains duplicate I- and E-units which perform the same operations each cycle and have their results compared.","PeriodicalId":154864,"journal":{"name":"Proceedings International Conference on Computer Design VLSI in Computers and Processors","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"56","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Computer Design VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1997.628874","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 56
Abstract
The S/390 G4 CMOS processor is an implementation of the IBM ESA/390 architecture on a single custom CMOS chip. It is a new design which uses a straightforward pipeline both to achieve a fast cycle time and to speed the design cycle. The complex instructions are implemented using a highly privileged subroutines called millicode. To achieve high data integrity while maintaining a high clock frequency, the chip contains duplicate I- and E-units which perform the same operations each cycle and have their results compared.