Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy

J. Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng
{"title":"Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy","authors":"J. Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng","doi":"10.1109/ISCAS46773.2023.10181322","DOIUrl":null,"url":null,"abstract":"A low-power motion estimation chip is designed for a wireless panoramic endoscope system. This chip consists of two motion estimation cores and is implemented by a dual-Vdd low-power technique. The proposed technique is efficient in decreasing power consumption without reducing the operation frequency of the chip. From the full-function chip measurements, this dual-Vdd chip can reduce power consumption by 20%~40% than the operation in single-Vdd for different clock frequencies.","PeriodicalId":177320,"journal":{"name":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","volume":"200 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Symposium on Circuits and Systems (ISCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS46773.2023.10181322","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

A low-power motion estimation chip is designed for a wireless panoramic endoscope system. This chip consists of two motion estimation cores and is implemented by a dual-Vdd low-power technique. The proposed technique is efficient in decreasing power consumption without reducing the operation frequency of the chip. From the full-function chip measurements, this dual-Vdd chip can reduce power consumption by 20%~40% than the operation in single-Vdd for different clock frequencies.
现场演示:用于无线全景内窥镜的低功耗双核运动估计芯片设计与验证
为无线全景内窥镜系统设计了一种低功耗运动估计芯片。该芯片由两个运动估计核心组成,采用双vdd低功耗技术实现。该技术在不降低芯片工作频率的情况下有效地降低了功耗。从全功能芯片测量来看,该双vdd芯片在不同时钟频率下比单vdd工作功耗降低20%~40%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信