Florian Fricke, André Werner, Keyvan Shahin, F. Werner, M. Hübner
{"title":"Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture","authors":"Florian Fricke, André Werner, Keyvan Shahin, F. Werner, M. Hübner","doi":"10.1109/IPDPSW.2019.00033","DOIUrl":null,"url":null,"abstract":"The research work presented in this paper is about a holistic tool-chain for generating, configuring and evaluating application-specific Coarse-Grained Reconfigurable Array (CRGA) architectures. This development was part of a large EU funded project with the name EXTRA. The reduced complexity of the architecture in comparison to fine-grained architectures like FPGAs is exploited to evaluate the Just-in-Time generation of VCGRA configurations. The manuscript presents the tool-chain that is responsible for the implementation of applications on the coarse-grained architecture. In particular, the tools for partitioning the applications, mapping the partitions and controlling the execution of the entire application on the target architecture will be examined. In addition, both the user interface and the interfaces between the components of the tool-chain are described. Subsequently, the presented tools are evaluated using a practical example and various metrics. We show, that the creation of configurations for the presented architectures can be carried out rapidly and therefore the generation of new configurations at run-time is feasible.","PeriodicalId":292054,"journal":{"name":"2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPDPSW.2019.00033","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The research work presented in this paper is about a holistic tool-chain for generating, configuring and evaluating application-specific Coarse-Grained Reconfigurable Array (CRGA) architectures. This development was part of a large EU funded project with the name EXTRA. The reduced complexity of the architecture in comparison to fine-grained architectures like FPGAs is exploited to evaluate the Just-in-Time generation of VCGRA configurations. The manuscript presents the tool-chain that is responsible for the implementation of applications on the coarse-grained architecture. In particular, the tools for partitioning the applications, mapping the partitions and controlling the execution of the entire application on the target architecture will be examined. In addition, both the user interface and the interfaces between the components of the tool-chain are described. Subsequently, the presented tools are evaluated using a practical example and various metrics. We show, that the creation of configurations for the presented architectures can be carried out rapidly and therefore the generation of new configurations at run-time is feasible.