V. Varadarajan, Y. Yasuda, S. Balasubramanian, T. Liu
{"title":"WireFET Technology for 3-D Integrated Circuits","authors":"V. Varadarajan, Y. Yasuda, S. Balasubramanian, T. Liu","doi":"10.1109/IEDM.2006.346982","DOIUrl":null,"url":null,"abstract":"A novel method to fabricate a transistor directly within a wire is presented. The phenomenon of aluminum-induced crystallization of silicon is used to embed crystalline Si regions within an aluminum wire, enabling FETs to be fabricated directly within interconnects. The wireFET fabrication process is relatively simple, does not require unconventional materials or processing methods, and has low associated thermal budget (Tmax les 400 degC), so that it can be a cost-effective method for implementing 3-dimensionally integrated circuits","PeriodicalId":366359,"journal":{"name":"2006 International Electron Devices Meeting","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2006.346982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A novel method to fabricate a transistor directly within a wire is presented. The phenomenon of aluminum-induced crystallization of silicon is used to embed crystalline Si regions within an aluminum wire, enabling FETs to be fabricated directly within interconnects. The wireFET fabrication process is relatively simple, does not require unconventional materials or processing methods, and has low associated thermal budget (Tmax les 400 degC), so that it can be a cost-effective method for implementing 3-dimensionally integrated circuits