Embedding of High Power RF Transistor Dies in PCB Laminate

Abstract

This paper describes a novel packaging method for high power RF transistors, which minimizes chip to matching-network interconnect parasitic elements. Interconnect parasitics have significant importance for the development of high-frequency or harmonically-tuned power amplifiers and also for advanced power amplifier architectures such as Doherty. The demonstrated packaging method minimizes such parasitics by embedding of the chip inside the PCB laminate, enabling the development of low cost power amplifier modules for higher frequencies and wider bandwidths. The performance of an embedded device is compared to a wire-bonded device using loadpull measurements, to show the effect of the embedding on conventional high power RF transistors.