Design and Performance Comparison of CNN Accelerators Based on the Intel Movidius Myriad2 SoC and FPGA Embedded Prototype

Abstract

Evolving Convolutional Neural Networks (CNNs) and their execution time performance are key factors for a wide range of applications that are based on deep learning. The need for meeting the applications' time constraints led to design AI accelerators and the current work contributes to this effort by presenting CNN accelerators based on two different design approaches: a) developing CNNs on a power efficient System on Chip (SoC), the Myriad2 and b) a VHDL application specific design and the corresponding FPGA architecture. Both systems target the optimization of time performance regarding the MNIST dataset application. The paper describes the two systems and compares the performance results.