R. Nandhakumar, S. Jeevananthan, Perumal Dananjayan
{"title":"Design and implementation of an FPGA-Based high performance ASIC for open loop PWM inverter","authors":"R. Nandhakumar, S. Jeevananthan, Perumal Dananjayan","doi":"10.1109/IICPE.2006.4685396","DOIUrl":null,"url":null,"abstract":"This paper presents a field programmable gate array (FPGA) based application specific integrated circuit (ASIC) for open loop inverters used in uninterrupted power supply (UPS) application. Many research works have been reported recently on inverter performance enhancement through carrier and reference modifications. The main aim of this work is to get a generalized algorithm, which can successfully reproduce the conventional and modified carrier and reference functions in a digital platform. A systematic digital (regular sampled) implementation of conventional sinusoidal pulse width modulation (SPWM) and the other high performance natural sampled PWM techniques are presented. The PWM modulator design is based on the Xilinx Spartan 3 XC3s400 FPGA and performance is verified with the prototype inverter.","PeriodicalId":227812,"journal":{"name":"2006 India International Conference on Power Electronics","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 India International Conference on Power Electronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IICPE.2006.4685396","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
This paper presents a field programmable gate array (FPGA) based application specific integrated circuit (ASIC) for open loop inverters used in uninterrupted power supply (UPS) application. Many research works have been reported recently on inverter performance enhancement through carrier and reference modifications. The main aim of this work is to get a generalized algorithm, which can successfully reproduce the conventional and modified carrier and reference functions in a digital platform. A systematic digital (regular sampled) implementation of conventional sinusoidal pulse width modulation (SPWM) and the other high performance natural sampled PWM techniques are presented. The PWM modulator design is based on the Xilinx Spartan 3 XC3s400 FPGA and performance is verified with the prototype inverter.