{"title":"Design of a high-density SoC FPGA at 20nm","authors":"B. Vest, Sean Atsatt, M. Hutton","doi":"10.1109/HOTCHIPS.2014.7478818","DOIUrl":null,"url":null,"abstract":"This article consists of a collection of slides from the author's conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for Altera's Arria 10 family of processor products.","PeriodicalId":299263,"journal":{"name":"2014 IEEE Hot Chips 26 Symposium (HCS)","volume":"192 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Hot Chips 26 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2014.7478818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This article consists of a collection of slides from the author's conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for Altera's Arria 10 family of processor products.