A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS

Cuilin Chen, T. Sugiura, T. Yoshimasu
{"title":"A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS","authors":"Cuilin Chen, T. Sugiura, T. Yoshimasu","doi":"10.23919/EUMIC.2018.8539942","DOIUrl":null,"url":null,"abstract":"A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/EUMIC.2018.8539942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.
一种14 ghz频带高线性堆叠FET功率放大器IC, P1dB为20.1 dBm, PAE为40.1%,采用56纳米SOI CMOS
提出了一种适用于14ghz波段无线通信系统的高效率线性功率放大器(PA)集成电路。为了在宽输入功率范围内提高压电集成电路的线性度和效率,提出了一种新型的四层MOSFET结构自适应偏置电路。该PA IC是在56纳米SOI CMOS中设计、制造和全面测试的。在线性模式下,PA IC在14 GHz和4.0 V电源电压下的输出P1dB为20.1 dBm。测得P1dB处PAE高达40.1%。在高效模式下,峰值PAE达到41.6%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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