A Low Power Diffused Bit Generator as a TRNG for Cryptographic Key Generation

D. Bharadwaj, P. Anirvinnan, B. S. Premanada
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Abstract

Cryptographic key generation is an important part of the secured communication system where the key that is generated has a major role to play in the strength of the security of the data that is transferred. To enhance the necessary strength of the key, the random number generated has to be highly secure. This is enhanced by the use of a True Random Number Generation. Diffused Bit Generator (DBG) is an entropy source which is used to produce a sequence of random bits. It is composed of a Linear Feedback Shift Register (LFSR) and a Cellular Automata in order to increase the randomness emanating from the DBG. The proposed LFSR has been designed using TSPC based D flip-flops and the XOR gates consisting of 6 transistors, which has enabled to fulfil the objective of low power. The circuit implementation has been done in Cadence Virtuoso in the CMOS 180 nm technology and simulated in Cadence Spectre. The supply voltage used was 1.8 V and the circuits were simulated for the frequencies ranging from 100 MHz to 1 GHz and the proposed DBG was found to consume lesser power when compared to the existing architectures.
一种用于加密密钥生成的低功耗扩散位发生器
加密密钥生成是安全通信系统的重要组成部分,生成的密钥对传输数据的安全性起着重要作用。为了增强密钥的必要强度,生成的随机数必须是高度安全的。使用真随机数生成增强了这一点。扩散比特发生器(DBG)是一种用于产生随机比特序列的熵源。它由一个线性反馈移位寄存器(LFSR)和一个元胞自动机组成,以增加DBG发出的随机性。所提出的LFSR采用基于TSPC的D触发器和由6个晶体管组成的异或门设计,从而实现了低功耗的目标。该电路在Cadence Virtuoso中采用CMOS 180 nm技术实现,并在Cadence Spectre中进行了仿真。所使用的电源电压为1.8 V,电路在100 MHz至1 GHz的频率范围内进行了模拟,与现有架构相比,所提出的DBG消耗的功耗更低。
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