{"title":"A GALS FFT processor with clock modulation for low-EMI applications","authors":"Xin Fan, M. Krstic, C. Wolf, E. Grass","doi":"10.1109/ASAP.2010.5541014","DOIUrl":null,"url":null,"abstract":"With the growth in complexity of digital CMOS circuits, the steep current fluctuations introduced by numerous transistors switching with clock signals are proven to be a significant source of electromagnetic interference (EMI). In recent years the reduction in EMI noise from high speed digital ICs has already gained intensive research attention. In this paper the pausible clocking based globally asynchronous locally synchronous (GALS) design with phase and frequency modulation on the locally generated clocks is proposed as a systematic solution to EMI reduction. As a practical example, a 64-point Radix-23 pipelined GALS FFT processor was implemented using the IHP 130nm CMOS technology for low-EMI applications. The on-chip measurements demonstrate 13dB attenuation at the clock fundamental frequency and more than 20dB attenuation at higher clock harmonics, in comparison with the synchronous design.","PeriodicalId":175846,"journal":{"name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.2010.5541014","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
With the growth in complexity of digital CMOS circuits, the steep current fluctuations introduced by numerous transistors switching with clock signals are proven to be a significant source of electromagnetic interference (EMI). In recent years the reduction in EMI noise from high speed digital ICs has already gained intensive research attention. In this paper the pausible clocking based globally asynchronous locally synchronous (GALS) design with phase and frequency modulation on the locally generated clocks is proposed as a systematic solution to EMI reduction. As a practical example, a 64-point Radix-23 pipelined GALS FFT processor was implemented using the IHP 130nm CMOS technology for low-EMI applications. The on-chip measurements demonstrate 13dB attenuation at the clock fundamental frequency and more than 20dB attenuation at higher clock harmonics, in comparison with the synchronous design.