{"title":"Design and performance measurement of a high-performance computing cluster","authors":"K. George, V. Venugopal","doi":"10.1109/I2MTC.2012.6229359","DOIUrl":null,"url":null,"abstract":"Graphics processor units (GPU) are specialized hardware accelerators that can be utilized for computations needing high parallelism and high memory bandwidth. Propelled by the attractive Flops/$ ratio and its capability to outperform a CPU cluster at the equivalent cost, large-scale GPU clusters are gaining popularity in the high-performance computing (HPC) community. However, the design challenges associated with the setup and application development process for an efficient HPC cluster includes: a) data movement and locality on the hardware accelerators; b) task mapping and allocation; and c) setting up a well-balanced system. In this paper, we present our experience setting up a GPU cluster for HPC applications; particularly signal processing for digital wideband receivers. We describe the architecture, hardware and software platform of the proposed cluster. The proposed GPU cluster implementing a 1.25 GHz digital wideband receiver was compared and contrasted against a HPC based predecessor receiver system. The adaptability of the GPU cluster was further demonstrated by utilizing it for a multiple receiver implementation that demanded higher data processing capability and throughput.","PeriodicalId":387839,"journal":{"name":"2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Instrumentation and Measurement Technology Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/I2MTC.2012.6229359","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Graphics processor units (GPU) are specialized hardware accelerators that can be utilized for computations needing high parallelism and high memory bandwidth. Propelled by the attractive Flops/$ ratio and its capability to outperform a CPU cluster at the equivalent cost, large-scale GPU clusters are gaining popularity in the high-performance computing (HPC) community. However, the design challenges associated with the setup and application development process for an efficient HPC cluster includes: a) data movement and locality on the hardware accelerators; b) task mapping and allocation; and c) setting up a well-balanced system. In this paper, we present our experience setting up a GPU cluster for HPC applications; particularly signal processing for digital wideband receivers. We describe the architecture, hardware and software platform of the proposed cluster. The proposed GPU cluster implementing a 1.25 GHz digital wideband receiver was compared and contrasted against a HPC based predecessor receiver system. The adaptability of the GPU cluster was further demonstrated by utilizing it for a multiple receiver implementation that demanded higher data processing capability and throughput.