Fault-tolerant computation within complex FIR filters

Abstract

In this paper we propose an architecture for the implementation of fault-tolerant computation within a high throughput multirate equalizer for all asymmetrical wireless LAN. The area overhead is minimized by exploiting the algebraic structure of the modulus replication residue number system (MRRNS). We demonstrate that for our system the area cost to correct a fault in a single computational channel is 82.7%. Generalized results for single error correction showing significant area savings are also presented.