On-chip Learning of Multilayer Perceptron Based on Memristors with Limited Multilevel States

Abstract

The cross-point memristor array is viewed as a promising candidate for neuromorphic computing due to its non-volatile storage and parallel computing features. However, the programming threshold and resistance fluctuation among different multilevel states restrict the capacity of weight representation and thus numerical precision. This poses great challenges for on-chip learning. This work evaluates the deterioration of learning accuracy on multilayer perceptron due to limited multilevel states and proposes stochastic “skip-and-update” algorithm to facilitate on-chip learning with low-precision memristors.