{"title":"An open DSP software architecture for multi-channel multi-decoder consumer audio/video solutions","authors":"T. Chen, J. Datta, B. Karley","doi":"10.1109/ICCE.1999.785154","DOIUrl":null,"url":null,"abstract":"An architecture which seamlessly integrates multiple audio decoders onto a single DSP is presented. A new concept in the form of an open software architecture is implemented which allows third party owned intellectual property in the form of specialized software modules to coexist as value-added post decoder processing phases. This modular software architecture maintains flexibility and adaptability for future decoder and post processing integration. The means by which this architecture supports post processing functions across decoders is the focus of this paper.","PeriodicalId":425143,"journal":{"name":"1999 Digest of Technical Papers. International Conference on Consumer Electronics (Cat. No.99CH36277)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 Digest of Technical Papers. International Conference on Consumer Electronics (Cat. No.99CH36277)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.1999.785154","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
An architecture which seamlessly integrates multiple audio decoders onto a single DSP is presented. A new concept in the form of an open software architecture is implemented which allows third party owned intellectual property in the form of specialized software modules to coexist as value-added post decoder processing phases. This modular software architecture maintains flexibility and adaptability for future decoder and post processing integration. The means by which this architecture supports post processing functions across decoders is the focus of this paper.