The simulation of a microprocessor based event set processor

Abstract

The availability of inexpensive, sophisticated microprocessors affords the computer system designer great flexibility in assigning simulation processes to independent computing elements. In this paper, the feasibility of assigning the functions of event set manipulation to a separate microprocessing element is investigated. Analysis of a large simulation program was performed to determine the relative amount of computer time required for event set processing, and the pattern of activation sequences for the event set processor. A simulation model was constructed to contrast the performance of a stand-alone computer system with that of a system using the same central processor and an independent event set processor. Parameters which were varied are processor and program loading relative processor speeds, and parameters to the event set algorithms. Performance results and a suggestion for the organization of a microprocessor based discrete event simulation computer are presented.