Resonant power supply noise cancelling with noise detector based in DLL and vernier TDC

Masahiro Kano, T. Nakura, K. Asada
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引用次数: 1

Abstract

This paper proposes an active resonant power supply noise cancelling with fast voltage drop sensor using the combination of delay-locked loop (DLL) and vernier time-to-digital converter (TDC). Also, we propose the capacitor selector circuit realizing the active insertion of capacitors in less silicon area. These components enable one clock noise detection with fine resolution. Simulation results show that our noise sensor detects 54 mV voltage drop in one clock cycle and cancels 28% of the supply noise by the active charge injection. The proposed circuits use the silicon area about 27 times more effectively than conventional passive decaps.
基于动态动态库和游标TDC的噪声检测器的谐振电源降噪
本文提出了一种采用锁延环和游标时间-数字转换器相结合的快速压降传感器有源谐振电源降噪方案。此外,我们还提出了电容选择电路,实现了在少硅区域内电容的主动插入。这些组件使一个时钟噪声检测具有良好的分辨率。仿真结果表明,噪声传感器在一个时钟周期内检测到54 mV的电压降,并通过主动电荷注入消除了28%的电源噪声。所提出的电路利用硅面积的效率是传统无源封装的27倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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