A Host Interface Architecture for HPPI

V. Kumar
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Abstract

Outline: Talk about the Architecture of the host interface for HIPPI and the performance results achieved. The talk includes the following: 1. Very breifly describe the architecture of a Node in the Paragon Supercomputer to point out that an interface is needed to: (a) Handle the requirements of the low-level HIPPI protocol. (b) Transfer data between the input/output channels of HIPPI and the host memory at the aggregate peak rate of 1.6 Gb/s. 2. (a) Describe the architecture of the host interface. (b) Show the data flow between the host memory and the input and output channels (c) Point out software design considerations for high performance. of HIPPI. 3. Discuss the performance results. Octobr 6.1993 Host Interface Architecture Performance results Reason for the Host Interface Requirements for an efficient algorithm
HPPI的主机接口体系结构
概述:讨论HIPPI主机接口的体系结构和实现的性能结果。演讲内容包括:非常简单地描述了Paragon超级计算机中Node的体系结构,指出需要一个接口来:(a)处理低级HIPPI协议的要求。(b) HIPPI的输入/输出通道与主机内存之间以1.6 Gb/s的峰值速率传输数据。2. 描述主机接口的体系结构。(b)显示主机内存与输入输出通道之间的数据流(c)指出高性能的软件设计考虑因素。HIPPI。3.讨论绩效结果。1993年10月6日主机接口架构性能结果主机接口的原因对高效算法的要求
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