S. Regimbal, Jean-Francois Lemire, Y. Savaria, G. Bois, E. Aboulhamid, A. Baron
{"title":"Automating functional coverage analysis based on an executable specification","authors":"S. Regimbal, Jean-Francois Lemire, Y. Savaria, G. Bois, E. Aboulhamid, A. Baron","doi":"10.1109/IWSOC.2003.1213040","DOIUrl":null,"url":null,"abstract":"This paper presents a novel approach for functional coverage analysis automation. It is well known that functional verification is a real bottleneck in any digital design development. Consequently, it is necessary to develop new methodologies to increase the quality of functional verification. A metric that measures the functional coverage is specific to each design, and it depends on its functional requirements. Hence, we propose a methodology supported by a tool that automates the coverage analysis at the functional level. Our tool takes as entry a standard executable specification and generates test bench components aimed at performing a functional coverage analysis on a specific design. We use functional metrics as parameters in our tool and apply theses metrics on an executable specification. Using our methodology, we are able to provide a quantitative evaluation of test suites developed to exercise the functionality defined in an executable specification. The application of these test suites on a RTL design improves error detection, through a better exploration of the design. It also increases the degree of confidence in the design.","PeriodicalId":259178,"journal":{"name":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2003.1213040","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
This paper presents a novel approach for functional coverage analysis automation. It is well known that functional verification is a real bottleneck in any digital design development. Consequently, it is necessary to develop new methodologies to increase the quality of functional verification. A metric that measures the functional coverage is specific to each design, and it depends on its functional requirements. Hence, we propose a methodology supported by a tool that automates the coverage analysis at the functional level. Our tool takes as entry a standard executable specification and generates test bench components aimed at performing a functional coverage analysis on a specific design. We use functional metrics as parameters in our tool and apply theses metrics on an executable specification. Using our methodology, we are able to provide a quantitative evaluation of test suites developed to exercise the functionality defined in an executable specification. The application of these test suites on a RTL design improves error detection, through a better exploration of the design. It also increases the degree of confidence in the design.